Title :
A programmable receiver front-end architecture supporting LTE
Author :
Abdelsalam, Hoda ; Hegazi, Emad ; Mostafa, Hassan ; Ismail, Yehea
Author_Institution :
Ceneter for Nano-Electron. & Devices, American Univ. in Cairo & Zewail City for Sci. & Technol., Cairo, Egypt
Abstract :
The desire of having applications covering all service specifications tremendously increases the demand for multi-band multi-standard receivers. A programmable receiver front-end architecture for multi-band multi-standard receivers is proposed. The receiver adopts a down-conversion quadrature band-pass FIR charge sampling mixer programmed via its controlling clocks. A time varying impedance matching network provides further selectivity. The architecture is simulated over three different frequencies spanning two octaves (2G, 1G and 500MHz) targeting LTE specifications. The proposed design achieves conversion gain of 23dB to 28dB, Noise Figure (NF) of 7dB to 9dB, out of band IIP3 of -1.9dBm to -5.6dBm, in band IIP3 of -1.5dBm to -5.7dBm and S11 <;-10 dB. The design is implemented using a 65nm CMOS technology.
Keywords :
CMOS integrated circuits; FIR filters; Long Term Evolution; band-pass filters; impedance matching; mixers (circuits); radio receivers; signal sampling; time-varying networks; CMOS technology; LTE; controlling clock; down conversion quadrature band-pass FIR charge sampling mixer; gain 23 dB; gain 28 dB; multiband multistandard receiver; noise figure 7 dB; noise figure 9 dB; programmable receiver frontend architecture; size 65 nm; time varying impedance matching network; Band-pass filters; Capacitance; Clocks; Linearity; Matched filters; Receivers; Resistance;
Conference_Titel :
Microelectronics (ICM), 2014 26th International Conference on
DOI :
10.1109/ICM.2014.7071797