DocumentCode :
3582354
Title :
A 4-bit 6GS/s time-based analog-to-digital converter
Author :
Hussein, Assem S. ; Fawzy, Mahmoud ; Ismail, M. Wagih ; Refky, Mohamed ; Mostafa, Hassan
Author_Institution :
Dept. of Electron. & Electr. Commun. Eng., Cairo Univ., Giza, Egypt
fYear :
2014
Firstpage :
92
Lastpage :
95
Abstract :
This paper proposes a 4-bit 6GS/s Time-Based Analog-to-Digital Converter (TADC) to be integrated inside the Software Defined Radio (SDR) receivers. The TADC is mainly composed of two blocks which are the Voltage-to-Time Converter (VTC) and the Time-to-Digital Converter (TDC). A prototype of the proposed TADC is implemented using 65 nm technology with a sampling rate of 6GS/s. An ENOB of 3.68 is achieved for an input frequency of 1.331 GHz. The whole system consumes a total power of 21.4 mW.
Keywords :
radio receivers; software radio; time-digital conversion; frequency 1.331 GHz; power 21.4 mW; software defined radio receiver; time based analog-digital converter; time-digital converter; voltage-time converter; CMOS integrated circuits; Clocks; Delays; Flip-flops; Inverters; Receivers; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics (ICM), 2014 26th International Conference on
Type :
conf
DOI :
10.1109/ICM.2014.7071814
Filename :
7071814
Link To Document :
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