DocumentCode :
3582410
Title :
Implementation study of path-based AOCV model on pessimism reduction for 20nm technology
Author :
Pua Siaw Fuang ; Mahyuddin, Nor Muzlifah
Author_Institution :
Altera Corp., Bayan Lepas, Malaysia
fYear :
2014
Firstpage :
80
Lastpage :
83
Abstract :
The Advanced On-Chip Variation (AOCV) model is used to systematically correct Liberty timing file for on-chip variation (OCV) based on the logic depth and distance of a path. The AOCV analysis solutions can be categorized into graph-based (GBA) and path-based analysis (PBA), which are refinement strategies over traditional OCV in static timing analysis. PBA AOCV performs recalculation on critical paths with advanced algorithm to reduce pessimism. This paper studies the implementation and parameters of AOCV in 20nm process node, specifically with the path-based approach, and compared against the conventional global On-Chip Variation for pessimism reduction. The result indicates that PBA AOCV has advantage over PBA OCV with 9% and 18% reduction in total variation paths and total negative slacks, respectively. By using recalculation algorithm, the path delay is annotated with adequate value of de-rate. Thus, pessimism can be further reduced at a cost of run time.
Keywords :
critical path analysis; graph theory; integrated circuit modelling; GBA; PBA; advanced on-chip variation model; critical path; graph-based analysis; liberty timing file; logic depth; path delay; path-based AOCV model; path-based analysis; pessimism reduction; size 20 nm; static timing analysis; Analytical models; Clocks; Conferences; Control systems; Delays; System-on-chip; Advanced on-chip variation; derate factor; path-based; pessimism; total negative slacks; violation paths;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Control System, Computing and Engineering (ICCSCE), 2014 IEEE International Conference on
Print_ISBN :
978-1-4799-5685-2
Type :
conf
DOI :
10.1109/ICCSCE.2014.7072693
Filename :
7072693
Link To Document :
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