DocumentCode :
3582449
Title :
FPGA-in-the-loop co-simulation of reentrant arrhythmia mechanism in one dimensional (1D) ring-shaped based on FitzHugh-Nagumo model
Author :
Adon, Nur Atiqah ; Mahmud, Farhanahani ; Jabbar, Mohamad Hairol ; Othman, Norliza
Author_Institution :
Microelectron. & Nanotechnol. - Shamsudin Res. Centre, Univ. Tun Hussein Onn Malaysia, Batu Pahat, Malaysia
fYear :
2014
Firstpage :
288
Lastpage :
293
Abstract :
This paper presents the simulation of reentrant excitation-conduction of cardiac cells realized by coupling 80 active circuits in one dimensional (1D) ring-shaped based on FitzHugh-Nagumo (FHN) model. 1D ring-shaped cable model is designed using Simulink in order to simulate an action potential signal and its conduction for a hardware design by using HDL Coder to automate the model for Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) code generation. Then, the VHDL design is functionally verified on a Field Programmable Gate Array (FPGA) Xilinx Virtex-6 board using HDL Verifier proving the model through FPGA-in-the-Loop (FIL) co-simulation approach. It can then be downloaded into a target FPGA device for real-time simulations. This novel approach of prototyping cardiac reentrant excitation-conduction provides a fast and effective FPGA-based hardware implementation flow towards a stand-alone implementation to perform complex real-time simulations compared with manual HDL designs.
Keywords :
bioelectric potentials; cardiology; cellular biophysics; equivalent circuits; field programmable gate arrays; hardware description languages; medical computing; medical disorders; very high speed integrated circuits; 1D ring-shaped cable model; FHN; FPGA-based hardware implementation; FPGA-in-the-loop cosimulation; Field Programmable Gate Array Xilinx Virtex-6 board; FitzHugh-Nagumo model; HDL Coder; HDL Verifier; Simulink; VHDL design; VHSIC; Very High Speed Integrated Circuit Hardware Description Language code generation; action potential signal; active circuits; cardiac cells; cardiac reentrant excitation-conduction; complex real-time simulation; hardware design; manual HDL designs; one dimensional ring-shaped model; reentrant arrhythmia mechanism; stand-alone implementation; target FPGA device; Computational modeling; Field programmable gate arrays; Hardware; Hardware design languages; Integrated circuit modeling; Mathematical model; Software packages; FPGA-in-the-Loop; FitzHugh-Nagumo Model; HDL Coder; Reentrant; real-time simulations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Control System, Computing and Engineering (ICCSCE), 2014 IEEE International Conference on
Print_ISBN :
978-1-4799-5685-2
Type :
conf
DOI :
10.1109/ICCSCE.2014.7072732
Filename :
7072732
Link To Document :
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