Title :
Partially adaptive look-ahead routing for low latency Network-on-Chip
Author :
Najib, Nadera ; Monemi, Alireza ; Marsono, Muhammad Nadzir
Author_Institution :
Fac. of Electr. Eng., Univ. Teknol. Malaysia, Johor Bahru, Malaysia
Abstract :
Adaptive routing algorithms offer the ability to avoid congestion by supporting multiple paths between a source and destination. However, supporting adaptive routing for low latency routers is a challenge due to the computation of routing algorithm in one router in advanced (i.e. look-ahead routing). This paper presents an RTL architecture of partially adaptive look-ahead routing algorithm on a recently proposed low latency, virtual channel wormhole Network-on-Chip (NoC) router. In our proposed design, each router pre-computes the preferred output ports based on its local congestion and transfers the preferred output ports to the neighbouring routers. These preferred output ports are used in the look-ahead routing to select the optimal output port for the packet. We compare our proposed partially adaptive routing architecture with the reference design using look-ahead XY routing algorithm under matrix-transpose traffic and obtained 10% improvement at maximum injection rate. Our proposed routing algorithm has negligible area overhead (<;2%) while has no influence on maximum operating frequency.
Keywords :
network routing; network-on-chip; RTL architecture; XY routing algorithm; congestion avoidance; injection rate; local congestion; low latency routers; matrix-transpose traffic; network-on-chip; operating frequency; optimal output port; partially adaptive look-ahead routing algorithm; reference design; virtual channel wormhole NoC router; Adaptation models; Algorithm design and analysis; Computer architecture; Ports (Computers); Routing; System recovery; System-on-chip; Low latency NoC router; Partially adaptive routing;
Conference_Titel :
Research and Development (SCOReD), 2014 IEEE Student Conference on
Print_ISBN :
978-1-4799-6427-7
DOI :
10.1109/SCORED.2014.7072956