DocumentCode :
3582570
Title :
A 9-bit current-steering Digital to Analog Converter for differential dc-offset compensation of a baseband chain
Author :
Abu Bakar, Faizah ; Zainol Murad, Sohiful Anuar ; Ismail, Rizalafande Che ; Saari, Ville ; Halonen, Kari
Author_Institution :
Fac. of Eng. Technol., Univ. Malaysia Perlis, Arau, Malaysia
fYear :
2014
Firstpage :
1
Lastpage :
4
Abstract :
A current-steering Digital to Analog Converter (IDAC) to compensate dc-offset of a baseband chain in a Synthetic Aperture Radar (SAR) receiver is presented in this paper. The differential dc-offset can be injected with the current steer controlled by 9 digital control bits. The simulated LSB is 1.4 mV and the differential voltage range is 283 mV when it is connected to the baseband chain. This IDAC is implemented in a 130 nm CMOS technology and occupies 0.05 mm2 of silicon area. From the postlayout simulation of the IDAC, the voltage range satisfies the specification obtained from the Monte Carlo simulations of the baseband chain. The 1 Least Significant Bit (1LSB) of the IDAC ensure the dc-offset at the input of the following ADC met the system requirement.
Keywords :
CMOS digital integrated circuits; Monte Carlo methods; digital control; digital-analogue conversion; 9-bit current-steering digital to analog converter; CMOS technology; IDAC; LSB; Monte Carlo simulations; SAR receiver; baseband chain; differential dc-offset compensation; digital control bits; least significant bit; synthetic aperture radar; CMOS; IDAC; Monte Carlo simulation; SAR; baseband chain;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Research and Development (SCOReD), 2014 IEEE Student Conference on
Print_ISBN :
978-1-4799-6427-7
Type :
conf
DOI :
10.1109/SCORED.2014.7072987
Filename :
7072987
Link To Document :
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