Title :
Pipelined architecture for inverse discrete cosine transform
Author :
Nikara, Jari ; Takala, Jarmo ; Akopian, David ; Saarinen, Jukka ; Astola, Jaakko
Author_Institution :
Dept. of Information Technology, Tampere University of Technology, P.O. Box 553, 33101 Tampere, Finland
Abstract :
In this paper, a pipelined architecture for inverse discrete cosine transform (IDCT) is presented. Pipeline architectures are popular in parallel fast Fourier transform implementations but they are rare in IDCT implementations due to the irregularities in fast IDCT algorithms. The proposed architecture is derived by applying vertical projection to in-place IDCT algorithm. The resulting structure is modular and easy to pipeline. The word width requirements in the internal arithmetic are estimated to fulfil the requirements set by IEEE standard for 8×8 inverse cosine transform.
Keywords :
Computer architecture; Discrete cosine transforms; IEEE standards; Mean square error methods; Shift registers; Signal processing algorithms;
Conference_Titel :
Signal Processing Conference, 2000 10th European
Print_ISBN :
978-952-1504-43-3
