Designing with FinFET technology

Tri-gate fin-FET processes are available, and likely to be the high-performance processes for the foreseeable future at process nodes of 22nm and below. We have investigated the major differences between design using bulk silicon devices and tri-gate processes. Differences do exist for the design engineering teams using the new processes, however, these differences are readily understood and there are no significant hurdles in switching from bulk silicon designs to tri-gate and fin-fet on bulk processes.