DocumentCode :
3586315
Title :
On-chip aging prediction circuit in nanometer digital circuits
Author :
Byunghyun Jang ; Jin Kyung Lee ; Minsu Choi ; Kyung Ki Kim
Author_Institution :
Dept. of Comput. & Inf. Sci., Univ. of Mississippi, Oxford, MS, USA
fYear :
2014
Firstpage :
68
Lastpage :
69
Abstract :
In nanometer technology, accurate circuit aging prediction of MOSFET digital circuits caused by aging phenomenon is one of the most critical issues for more reliable adaptive tuning system design. This paper proposes a new on-chip aging sensor circuit to predit and detect a circuit failure caused by BTI and HCI aging effects on digital circuits. The proposed circuit is based on timing warning windows to warn against a guardband violation of sequential circuits, and generates three warning bits right before circuit failures occur.
Keywords :
MOSFET; digital integrated circuits; electric sensing devices; nanoelectronics; sequential circuits; BTI aging effects; HCI aging effects; MOSFET digital circuits; adaptive tuning system design; circuit aging prediction; circuit failures; nanometer digital circuits; nanometer technology; on-chip aging prediction circuit; on-chip aging sensor circuit; sequential circuits; timing warning windows; Aging; CMOS integrated circuits; CMOS technology; Logic gates; System-on-chip; Timing; aging effect; aging sensor; guardband violation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2014 International
Type :
conf
DOI :
10.1109/ISOCC.2014.7087599
Filename :
7087599
Link To Document :
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