DocumentCode :
3586356
Title :
Efficient Min-Max nonbinary LDPC decoding on GPU
Author :
Huyen Pham Thi ; Ajaz, Sabooh ; Hanho Lee
Author_Institution :
Dept. of Inf. & Commun. Eng., Inha Univ., Incheon, South Korea
fYear :
2014
Firstpage :
266
Lastpage :
267
Abstract :
This paper presents an novel modified Min-Max algorithm (MMMA) and an efficient implementation of an nonbinary LDPC (NB-LDPC) decoder on a graphics processing unit (GPU) to achieve both great flexibility and scalability. The MMMA for check node processing removes the multiplications over Galois-field in merger step and significantly reduces the decoding latency. The proposed MMMA provides a better BER performance than previous algorithm. The experimental results show that the GPU-based implementation of the proposed NB-LDPC decoder provides higher throughput and the coding gain under low 10-8 BER comparted to CPU-based implementation.
Keywords :
Galois fields; error statistics; graphics processing units; minimax techniques; parity check codes; BER performance; CPU based implementation; GPU; Galois-field; MMMA; NB-LDPC decoder; check node processing; coding gain; decoding latency; graphics processing unit; min-max nonbinary LDPC decoding; modified min-max algorithm; Decoding; Graphics processing units; Performance evaluation; CUDA; GPU; Min-Max; decoding; nonbinary LDPC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2014 International
Type :
conf
DOI :
10.1109/ISOCC.2014.7087640
Filename :
7087640
Link To Document :
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