Development of a virtual platform for IP and firmware verification

The proposed virtual platform in this paper is composed of the basic IP models and has an integrated simulation functionality. The basic TLM models used to build a virtual platform are ARM9 processor core, memory, AMBA bus, displays, and system peripherals. And these TLM models are connected to each other. The virtual platform is built by porting the IP TLM model for the IP verification on the previous virtual platform. And the firmware for IP operation is developed. The operation and verification of the IP model are performed by simulating the newly formed virtual platform. In this paper, the verification of UART, Camera IP, and face recognition IP was performed by using the integrated simulation of the constructed virtual platform. With the integration simulation of virtual platform developed in this paper, it is possible to develop both the IP and the firmware simultaneously. Therefore, the development period is shortened.