Design of CMOS dual antifuse OTP memory based on gate oxide

This paper presents a one-time-programmable ROM based on CMOS dual antifuses achieving high reliability and performance. The CMOS antifuse exploits the gate oxide layer of a typical CMOS process and thereby does not need an additional mask step for antifuse implementation. The proposed antifuse circuit comprises two antifuse nMOS transistors and two pMOS access transistors. Each antifuse cell employs differential architecture. An antifuse cell compares two differential outputs and determines its final output. This dual antifuse cell shows strong reliability against soft-breakdown failure. This high reliability makes the proposed one-time-programmable ROM can be applicable to high reliability such as encryption systems.