DocumentCode :
3586382
Title :
Near-threshold-voltage circuit design: The design challenges and chances
Author :
I-Chyn Wey ; Po-Jen Lin ; Bing-Chen Wu ; Chien-Chang Peng ; Pin-Hsi Lin
Author_Institution :
Dept. of Electr. Eng., Chang Gung Univ., Taoyuan, Taiwan
fYear :
2014
Firstpage :
138
Lastpage :
141
Abstract :
NTV is a new low power design concept for the pursuit of the highest power usage efficiency. The characteristics for each logic family are quite different under NTV while comparing to its operation under normal supply voltage. The circuit/architecture design policy under NTV is also different from its normal supply voltage operation. Process variation, performance degradation, and noise-interference are the three major design challenges in NTV design. In this paper, some effective candidate design solutions are presented to overcome these crucial NTV issues.
Keywords :
integrated circuit design; integrated circuit noise; low-power electronics; threshold logic; NTV design; circuit design policy; logic family; low power design concept; near-threshold-voltage circuit design; noise-interference; normal supply voltage operation; performance degradation; power usage efficiency; process variation; CMOS integrated circuits; Energy efficiency; Generators; Signal generators; Transistors; low power; near-threshold-voltage; noise-tolerant; process-variation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2014 International
Type :
conf
DOI :
10.1109/ISOCC.2014.7087666
Filename :
7087666
Link To Document :
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