Title :
Analysis and design of mixed signal oscilloscope for jitter reduction
Author :
Mevlsi, Senthooradevi K.
Author_Institution :
Mohammad Sathak AJ Coll. of Eng., Chennai, India
Abstract :
This paper presents a 12.5-Gb/s on-chip oscilloscope (OCO) circuit to measure eye diagrams and jitter histograms of high-speed digital signals. The proposed circuit adopts a novel architecture to capture both single-ended and differential signals. In addition, it is capable of measuring the eye openings and jitter of the input signals without the need to construct the whole eye diagram which makes it a suitable candidate for eye opening monitor circuits. An asynchronous sampling technique and an efficient algorithm are employed in this research to decrease the area of the OCO as well as its processing time. The proposed circuit is fabricated in a 65-nm CMOS technology and the measurement results show sub-Pico second resolution when the input signals consist of a 10-GHz clock signal and a 12.5 GB/spseudorandom binary sequence. The OCO circuit has a power consumption of 1.9 m W, and its core area is 40 × 60 μm.
Keywords :
CMOS integrated circuits; asynchronous circuits; eye; jitter; mixed analogue-digital integrated circuits; oscilloscopes; CMOS technology; OCO circuit; asynchronous sampling technique; binary sequence; bit rate 12.5 Gbit/s; differential signal; eye diagram measurement; eye opening monitor circuit; frequency 10 GHz; high-speed digital signal; jitter histogram reduction; mixed signal oscilloscope; on-chip oscilloscope circuit; power 1.9 mW; single-ended signal; size 65 nm; Clocks; Histograms; Jitter; Monitoring; Oscilloscopes; Signal resolution; System-on-chip; Asynchronous sampling; built-in self test (BIST); eye diagram; eye-opening monitor (EOM); jitter measurement; on-chip oscilloscope;
Conference_Titel :
Emerging Trends In New & Renewable Energy Sources And Energy Management (NCET NRES EM), 2014 IEEE National Conference On
Print_ISBN :
978-1-4799-8193-9
DOI :
10.1109/NCETNRESEM.2014.7088748