DocumentCode
3588488
Title
Development and test of klystron linearization packages for FPGA-based low level RF control systems of ILC-like electron accelerators
Author
Omet, M. ; Michizono, S. ; Matsumoto, T. ; Miura, T. ; Qiu, F. ; Schlarb, H. ; Branlard, J. ; Cichalewski, W. ; Chase, B. ; Varghese, P.
Author_Institution
SOKENDAI, Hayama, Japan
fYear
2014
Firstpage
1
Lastpage
4
Abstract
We report the development and implementation of two FPGA-based predistortion-type klystron linearization algorithms at the Fermi National Accelerator Laboratory (FNAL), USA and the Deutsches Elektronen Synchrotron (DESY), Germany. With those the generation of correction factors on the FPGA was improved, avoiding quantization and decreasing memory requirements. At FNAL the linearization algorithm was tested at the Advanced Superconducting Test Accelerator (ASTA) demonstrating a successful implementation. The functionality of the algorithm implemented at DESY was demonstrated successfully in a simulation.
Keywords
control systems; field programmable gate arrays; klystrons; ASTA; DESY; Deutsches Elektronen Synchrotron; FNAL; FPGA-based low level RF control systems; FPGA-based predistortion-type klystron linearization algorithms; Fermi National Accelerator Laboratory; ILC-like electron accelerators; advanced superconducting test accelerator; klystron linearization packages; Algorithm design and analysis; Cavity resonators; Delays; Field programmable gate arrays; Klystrons; Polynomials; Radio frequency; Amplifier; FPGA; ILC; klystron; linearization;
fLanguage
English
Publisher
ieee
Conference_Titel
Real Time Conference (RT), 2014 19th IEEE-NPSS
Print_ISBN
978-1-4799-3658-8
Type
conf
DOI
10.1109/RTC.2014.7097445
Filename
7097445
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