Title :
RBPP: A row based DRAM page policy for the many-core era
Author :
Xiaowei Shen ; Fenglong Song ; Haibo Meng ; Shuqian An ; Zhimin Zhang
Author_Institution :
State Key Lab. of Comput. Archit., Inst. of Comput. Technol., Beijing, China
Abstract :
Memory requests in many-core systems are interleaved with each other and the locality of many-core systems decreases heavily. Page policies in traditional single core systems are not effective when it comes to many-core systems, because the open-page policy needs much locality of memory requests and the close-page policy takes no advantage of the remaining locality of many-core systems. There are some related memory page management policies, but their high complexity makes them unsuitable to many-core systems. They either need too much modification in operating systems or have large area and power overhead. To overcome these shortcomings of current page policies, in this paper, we propose the row based page policy, that is, RBPP, for the many-core systems, which tracks the row addresses of memory requests to each bank and uses row addresses as the indicator to decide whether or not to close the row buffer when the active memory request finished. We evaluate the proposed RBPP via Gem5 and DRAMSim2, and the results show that row based page policy can decrease the average memory latency by 14.7% and 4.0% over the open-page policy and the close-page policy, respectively. And the area overhead of row based page policy is decreased by 91.4 % and 91.5% over access based page policy and two-level predictor page policy, respectively.
Keywords :
DRAM chips; operating systems (computers); storage management; DRAMSim2; Gem5; RBPP; access based page policy; close-page policy; many-core systems; memory page management policies; memory requests; open-page policy; operating systems; row based DRAM page policy; row based page policy; two-level predictor page policy; Benchmark testing; Delays; History; Operating systems; Radiation detectors; Random access memory; Registers; DRAM; RBPP scheme; many-core; memory latency; page policy;
Conference_Titel :
Parallel and Distributed Systems (ICPADS), 2014 20th IEEE International Conference on
DOI :
10.1109/PADSW.2014.7097922