DocumentCode :
3588967
Title :
Modeling and measurement of noise aware clocking in power supply noise analysis
Author :
Yaping Zhou ; Sudhakaran, Sunil ; Naik, Aniket ; Xin Chang ; Lin, Daniel ; Raja, Tezaswi ; Idgunji, Sachin
Author_Institution :
Nvidia Corp., Santa Clara, CA, USA
fYear :
2014
Firstpage :
7
Lastpage :
10
Abstract :
Power noise aware clocking in modern chips can reduce power supply noises and relax on-chip timing requirements during power drooping. This paper proposes and demonstrates a power noise simulation method to consider these two effects. Measurement results are also presented.
Keywords :
circuit noise; clocks; electric noise measurement; power measurement; power supply circuits; timing circuits; power drooping; power noise aware clocking measurement; power noise simulation method; power supply noise analysis; relax on-chip timing requirement; Clocks; Delays; Noise; Noise measurement; Power supplies; Semiconductor device measurement; noise aware clocking; power noisesimulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2014 IEEE 23rd Conference on
Print_ISBN :
978-1-4799-3641-0
Type :
conf
DOI :
10.1109/EPEPS.2014.7103579
Filename :
7103579
Link To Document :
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