A lumped element circuit model for monolithic transformers in silicon-based RFICs

This paper presents an ideal lumped-element equivalent circuit model for on-chip monolithic transformers on silicon substrates. R, L Foster networks in a T-topology are used to capture the frequency-dependent proximity and skin effects in the transformer windings as well as substrate eddy-current effects and, hence, the complete frequency-dependent self and mutual impedances of the transformer. The model is passive by construction and is compatible with transient simulations. A stacked transformer on a 10 ohm-centimeter CMOS substrate has been used to verify the model. The model exhibits good agreement with simulation data and measurements over a frequency range of 0.1 - 10 GHz.