Broadband integration using FR-4 to silicon CPW-to-CPW transition

This work demonstrates the use of gold stud bumps in the design of a CPW-to-CPW flip-chip transition between a silicon die and a FR-4 substrate. The performance is optimal in the 57 to 77 GHz range with return loss values better than 20 dB. The insertion loss of the designed transition and bump is 0.35 dB at 60 GHz as demonstrated in a back-to-back design. To demonstrate the usefulness of the transition, a back-to-back transition is integrated with a broadband aperture bowtie antenna fabricated onto the FR-4 substrate. The fractional bandwidth of the assembled IC and antenna using two stud bump transitions is better than 37% for a bump pitch of 400 μm.