Silicon interposers with integrated passive devices, an excellent alternativ to discrete components

A new way of designing high density silicon capacitors that are intended to be co-integrated with TSV for advanced silicon interposers is presented. This new kind of design; called “mosaic” enables to manufacture IPDs with capacitor density up to 500nF/mm² while maintaining ultra low ESR. PICS™ “mosaic” capacitors implement localized elements set in parallel on a grid that behave as a parallel network and exhibit the following characteristics: The global “mosaic” capacitor has a linear dependency with C_Global=N · C_Local where N is the number of repetitions of the localized element and C_Local its capacitance; ESR and ESL have an inverse dependency with N : L_Global=L_Local/N and ESR_Global=ESR_Local/N. Thanks to the 1/N variation of both ESL and ESR; and the N·C variation of the global capacitance, the products ESR·C and ESL·C are nearly constant which respectively means that the cutoff and SRF of the device are also constant, whatever the N value is. The global capacitor performances (like SRF) are driven by the most elementary building block and almost independent from the capacitor size.