DocumentCode :
3591071
Title :
Extracting effective functional tests from commercial programs
Author :
Kodakara, Sreekumar Vadakke ; Sagar, Mehul V. ; Yuen, Joel
Author_Institution :
Intel Corp., Hillsboro, OR, USA
fYear :
2015
Firstpage :
1
Lastpage :
6
Abstract :
We describe a tool and methodology for extracting short and effective functional tests from long running commercial programs and manufacturing system tests for testing microprocessors and SOCs. The tool combines fast Instruction Set Architecture (ISA) simulator and Design for Test (DFT) capabilities of the microprocessor to enable tracing of long running workloads. The trace is then converted into short functional test programs that can be replayed back in silicon. The tool can extract test programs from BIOS, operating systems, application programs and long running manufacturing system test programs. Using data from silicon experiments on recent microprocessor products, we show that the short tests extracted with our tool was able to screen the defective units as effectively as the original long running application with 6X to 15X reduction in test time.
Keywords :
design for testability; instruction sets; microprocessor chips; program testing; system-on-chip; BIOS; DFT capability; ISA simulator; SOC; application program; commercial program; design for test capability; functional test program; instruction set architecture simulator; manufacturing system test program; microprocessor product; operating system; Assembly; Computer architecture; Hardware; Microprocessors; Pipelines; Registers; Silicon; architecture; functional tests; hvm; microprocessor; software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium (VTS), 2015 IEEE 33rd
Type :
conf
DOI :
10.1109/VTS.2015.7116259
Filename :
7116259
Link To Document :
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