DocumentCode
3591358
Title
Fabrication of Sub-50nm ZnO thin-film transistors with film profile engineering and laminated hardmask structure
Author
Rong-Jhe Lyu ; Horng-Chih Lin ; Tiao-Yuan Huang
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2015
Firstpage
1
Lastpage
2
Abstract
We proposed a modified film profile engineering (FPE) process with laminated hardmask (HM) structure to fabricate ZnO thin-film transistors (TFTs) with channel length (L) down to 10 nm. The fabricated ultra-short devices demonstrate uniform and excellent performance. 38 nm ZnO TFTs with discrete TiN gates were also fabricated for suppressing the off-state leakage current.
Keywords
II-VI semiconductors; leakage currents; thin film transistors; titanium compounds; wide band gap semiconductors; zinc compounds; TiN; ZnO; ZnO thin film transistors; channel length; discrete TiN gates; film profile engineering; laminated hardmask structure; off-state leakage current; size 38 nm; size 50 nm; ultrashort devices; Electron devices;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems and Application (VLSI-TSA), 2015 International Symposium on
Type
conf
DOI
10.1109/VLSI-TSA.2015.7117553
Filename
7117553
Link To Document