• DocumentCode
    3592096
  • Title

    Interconnect mode conversion in high-speed VLSI circuits

  • Author

    Qu?©r?©, Y. ; LeGouguec, T. ; Martin, P.M. ; Huret, F.

  • Author_Institution
    Lab. d´´Electronique et Systemes de Telecommun., Univ. de Bretagne Occidentale, Brest, France
  • fYear
    2004
  • fDate
    6/26/1905 12:00:00 AM
  • Firstpage
    265
  • Lastpage
    270
  • Abstract
    A modification of the electromagnetic field configuration (mode conversion) at interconnect discontinuities in deep submicron digital ULSI circuits was investigated by using a full wave electromagnetic analysis. The mode conversion analysis is indispensable in identifying the signal return path, the return current distribution, and therefore for an accurate inductance modeling which remains a challenging problem. On the other hand, switching activity of a high speed CMOS circuit may produce large current derivatives. These transient currents can generate large potential surges and coupled noise due to the parasitic resistances and inductances of the wires. To this aim, we determined a simple design rule to reduce the mode conversion phenomenon and, therefore, decrease noise in high-speed ULSI circuits.
  • Keywords
    ULSI; VLSI; circuit simulation; computational electromagnetics; coupled circuits; high-speed integrated circuits; inductance; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; 25 to 40 GHz; coupled noise; digital ULSI circuits; electromagnetic field configuration; full wave EM analysis; high speed CMOS circuit switching activity; high-speed ULSI circuit noise; high-speed VLSI circuits; inductance modeling; interconnect discontinuities; interconnect mode conversion; parasitic inductances; return current distribution; signal return path; surges; time-domain circuit simulation; wire parasitic resistances; Circuit noise; Current distribution; Electromagnetic analysis; Electromagnetic fields; Inductance; Integrated circuit interconnections; Signal analysis; Signal processing; Ultra large scale integration; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design, 2004. Proceedings. 5th International Symposium on
  • Print_ISBN
    0-7695-2093-6
  • Type

    conf

  • DOI
    10.1109/ISQED.2004.1283684
  • Filename
    1283684