Title :
GREMA: Graph reduction based efficient mask assignment for double patterning technology
Author :
Xu, Yue ; Chu, Chris
Author_Institution :
Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Abstract :
Double patterning technology (DPT) has emerged as the most hopeful candidate for the next technology node of the ITRS roadmap. The goal of a DPT decomposer is to decompose the entire layout on each layer onto two masks. It assigns two features to different masks if their spacing is less than a predefined threshold. Besides, some features must be sliced and put onto two masks so that there would be a feasible solution for mask assignment. Such slicing will cause stitches that affect yield. So decomposer needs to minimize their number. In this paper, we formulate the DPT decomposition problem as a maximum cut problem. We propose an extremely efficient two-stage decomposition algorithm called GREMA. The first stage of GREMA generates a set of candidate stitches to ensure that feasible solutions exist for DPT decomposition. The second stage uses maximum cut to find the minimal set of stitches. Our decomposer is able to solve much larger realistic design problems. Experiments demonstrated that GREMA achieved great performance on resolving conflicts with greatly reduced runtime.
Keywords :
VLSI; masks; nanopatterning; GREMA; double patterning technology; efficient mask assignment; graph reduction; Circuits; Delay; Etching; Euclidean distance; Lithography; Permission; Resists; Runtime; Silicon; Very large scale integration;
Conference_Titel :
Computer-Aided Design - Digest of Technical Papers, 2009. ICCAD 2009. IEEE/ACM International Conference on
Print_ISBN :
978-1-60558-800-1
Electronic_ISBN :
1092-3152