Title :
Electro-thermal high-level modeling of integrated circuits
Author :
Krencker, J.-C. ; Kammerer, J.-P. ; Herve, Y. ; Hebrard, Luc
Author_Institution :
Inst. d´Electron. du Solide et des Syst. (InESS), Strasbourg, France
Abstract :
Operating temperature and temperature gradients are of critical concern in the design of planar integrated circuits (ICs) and are bound to be exacerbated in the upcoming 3D technologies. However, a thermal aware design of ICs allows thermal issues to be kept to the minimum. Previously, a simulator integrated in the Cadence® environment that allows electro-thermal simulations to be carried out at transistor levels has been presented. In this paper, a methodology used to build high-level electro-thermal model compliant with this simulator is detailed.
Keywords :
circuit simulation; integrated circuit design; three-dimensional integrated circuits; 3D technologies; Cadence; electro-thermal high-level modeling; planar integrated circuits; temperature gradients; Heating; Integrated circuit modeling; Mathematical model; Temperature distribution; Temperature sensors; Thermal analysis; Circuit Simulation; Electro-thermal; HighLevel Model; VHDL-AMS; Verilog-A;
Conference_Titel :
Thermal Investigations of ICs and Systems (THERMINIC), 2012 18th International Workshop on
Print_ISBN :
978-1-4673-1882-2
