• DocumentCode
    3592897
  • Title

    Crack block: A pro active activity on die crack resolution for thin dies

  • Author

    Chay Tan, Richard ; Altar, Robert ; Ramos, Manny

  • Author_Institution
    ON Semicond. Golden, Cavite, Philippines
  • fYear
    2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    With the on going drive to reduce costs for its packages. ON Semiconductor assembly sites have done extensive efforts to reduce package costs aiming primarily on the Bill of Material The initial stimulus is brought about by a customer requirement for a device with similar footprint but with a lower profile. The stack analysis conducted during package design entailed a required maximum die thickness of 113μm (4.5 mils). Subsequent Design Failure Mode and Effect Analysis (DFMEA) conducted came up with several possible failure modes. One of them was possible die crack during die attach process. This paper aims to explain OSPI-NPD´s pro active exertion to counter possible de crack problem on Very Small Outline Integrated Circuit (VSOIC) Package.
  • Keywords
    cracks; integrated circuit design; integrated circuit packaging; microassembling; die attach process; die crack; die crack resolution; package design; stack analysis; thin dies; very small outline integrated circuit package; Economics; Fault trees; Microassembly; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Manufacturing Technology Conference (IEMT), 2014 IEEE 36th International
  • Type

    conf

  • DOI
    10.1109/IEMT.2014.7123106
  • Filename
    7123106