A Low Energy FFT/IFFT Processor for Hearing Aids

Author

Chong, Kwen-Siong ; Gwee, Bah-Hwee ; Chang, Joseph S.

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ.

fYear

2007

Firstpage

1169

Lastpage

1172

Abstract

We present a 16-bit low voltage (1.1 V - 1.4V) energy efficient 128-point decimation-in-time fast Fourier transform/inverse fast Fourier transform (FFT/IFFT) processor specifically for hearing aid applications. The FFT/IFFT processor embodies several low power/energy methodologies, including the clock gating approach, ad-hoc control, operand isolation and low power library cells, to satisfy the tight constraints of low voltage low energy and a small silicon area realization for a practical hearing aid. Based on the prototype IC measurements, the proposed FFT/IFFT processor dissipates ~ 188nJ @ 1.1V, features computation delay of < 0.48ms @ 1.1 V, and occupies 1.44mm² @ 0.35mum CMOS process.

Keywords

CMOS integrated circuits; biomedical electronics; fast Fourier transforms; hearing aids; integrated circuit measurement; microprocessor chips; 0.35 micron; 1.1 to 1.4 V; 16 bit; CMOS process; FFT processor; IC measurements; IFFT processor; ad-hoc control; clock gating approach; hearing aids; inverse fast Fourier transform processor; low power library cells; operand isolation; Auditory system; Clocks; Energy efficiency; Fast Fourier transforms; Hearing aids; Libraries; Low voltage; Prototypes; Silicon; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378258

Filename

4252848