• DocumentCode
    3596758
  • Title

    Design rule check and layout versus schematic for 3D integration and advanced packaging

  • Author

    Fischbach, Robert ; Heinig, Andy ; Schneider, Peter

  • Author_Institution
    Design Autom. Div. EAS, Fraunhofer Inst. for Integrated Circuits IIS, Dresden, Germany
  • fYear
    2014
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    In this paper we will present a solution for automatic design rule checking (DRC) and layout versus schematic comparison (LVS) of 2.5D/3D systems, which enables an early check of subcomponents as well as whole system checks. The advantage of our approach is the unique data handling for different DRC and LVS runs, which allows the automatic derivation of partial design data from one single data base. Such an approach is essential for industrial driven designs of 2.5/3D systems. Otherwise, there is a high risk of mistakes related to data conversion and versioning problems. Such data handling issues can result in erroneous designs and cost extensive redesigns.
  • Keywords
    integrated circuit packaging; three-dimensional integrated circuits; 3D integration; advanced packaging; automatic design rule checking; data handling; layout versus schematic; netlist handling; partial design data; physical verification; Data handling; Data models; Integrated circuit modeling; Layout; SPICE; System analysis and design; Three-dimensional displays; 3D integration; DRC; LVS; advanced packaging; chip/package co-design; netlist handling; physical verification;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    3D Systems Integration Conference (3DIC), 2014 International
  • Type

    conf

  • DOI
    10.1109/3DIC.2014.7152150
  • Filename
    7152150