• DocumentCode
    3597491
  • Title

    Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature

  • Author

    Simek, Vaclav ; Ruzicka, Richard

  • Author_Institution
    Fac. of Inf. Technol., Brno Univ. of Technol., Brno, Czech Republic
  • fYear
    2014
  • Firstpage
    501
  • Lastpage
    506
  • Abstract
    Nowadays, there can be identified at ease a number of significant areas based on a conventional digital circuitry, such as evolvable or adaptive hardware, fault-tolerant architectures, reconfigurable systems or circuit development, where the introduction of partial reconfiguration principles may bring significant benefits with respect to traditional approaches. In case of polymorphic digital circuits (polymorphic digital circuit is able to perform more than one intended function, it typically has one stable structure for all required functions and the actually performed function or mode depends on a state of an environment) only one small-scale solution has been reported so far - the REPOMO. In this paper, main attention is given to the proposal of an innovative approach with increased flexibility, where the resulting capabilities are demonstrated.
  • Keywords
    digital circuits; fault tolerance; logic gates; reconfigurable architectures; REPOMO; adaptive hardware; circuit development; fault-tolerant architecture; partial reconfiguration feature; polymorphic digital circuit; polymorphic digital gate; reconfigurable platform; CMOS integrated circuits; Digital circuits; Hardware; Integrated circuit interconnections; Logic gates; Reconfigurable architectures; Transistors; partial reconfiguration; polymorphic electronics; reconfigurable circuit;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Modelling Symposium (EMS), 2014 European
  • Print_ISBN
    978-1-4799-7411-5
  • Type

    conf

  • DOI
    10.1109/EMS.2014.26
  • Filename
    7154051