• DocumentCode
    3598346
  • Title

    A Note on Clustering Modules for Floorplanning

  • Author

    Gabbe, John D. ; Subrahmanyam, P.A.

  • Author_Institution
    AT&T Bell Laboratories, Holmdel, NJ
  • fYear
    1989
  • Firstpage
    594
  • Lastpage
    597
  • Abstract
    Many VLSI floorplanners work by recursively decomposing rectangular modules into lower-level rectangular modules until the leaf-level modules are reached[5]. Good layouts require good floorplans. The quality of a floorplan depends (among other things) on how the leaf-level modules are clustered into the various levels of the hierarchy. Some of the factors that determine the suitability of a decomposition are the geometry of the modules, the connectivity among modules, and timing constraints. Our experience with the mechanization of a VLSI design manager[1] has shown that the initial structural hierarchy that arises during synthesis from behavioral specifications is not always suitable for floorplanning. We describe hierarchical-clustering-based algorithms that lead to a small number of superior candidate hierarchies.
  • Keywords
    Aggregates; Circuits; Clustering algorithms; Distributed computing; Geometry; Latches; Machinery; Permission; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1989. 26th Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-89791-310-8
  • Type

    conf

  • DOI
    10.1109/DAC.1989.203465
  • Filename
    1586449