Title :
The design of a low energy FPGA
Author :
George, Varghese ; Zhang, Hui ; Rabaey, Jan
Author_Institution :
Berkeley Wireless Res. Center, California Univ., CA, USA
Abstract :
This work presents the design of an energy efficient FPGA architecture. Significant reduction in the energy consumption is achieved by tackling both circuit design and architecture optimization issues concurrently. A hybrid interconnect structure incorporating nearest neighbor connections, symmetric mesh architecture, and hierarchical connectivity is used. The energy of the interconnect is also reduced by employing low-swing circuit techniques. These techniques have been employed to design and fabricate an FPGA. Preliminary analysis show energy improvement of more than an order of magnitude when compared to existing commercial architectures.
Keywords :
CMOS logic circuits; circuit optimisation; field programmable gate arrays; integrated circuit design; logic design; low-power electronics; architecture optimization; circuit design; energy consumption; energy efficient FPGA architecture; hierarchical connectivity; hybrid interconnect structure; interconnect energy reduction; low energy FPGA design; low-swing circuit techniques; nearest neighbour connections; symmetric mesh architecture; Clocks; Computer architecture; Energy consumption; Energy efficiency; Field programmable gate arrays; Frequency; Integrated circuit interconnections; Logic; Power dissipation; Switches;
Conference_Titel :
Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on
Print_ISBN :
1-58113-133-X
