Circulating current reduction of parallel connected four-pole inverters

Connecting the four-pole inverters (FPIs) in parallel has many benefits, like lower cost, high flexibility and excellent reliability, and becomes a favorite option in industry. However, such side effects of parallel connection as the circulating current will lead to severe distortion and extra loss. The circulating current is mainly caused by the difference of common mode voltage (CMV) and closely associated with switching states. The zero states contain extremes of CMV levels, which aims to significantly affect the circulating current. This paper presents a three-dimensional pulse width modulation (3-D PWM) approach adapted to the parallel connected FPIs. The 3-D modulation scheme substituting the zero states with active states is so-called three-dimensional active zero state PWM (3-D AZSPWM) and based classical 3-D space vector PWM (3-D SVPWM), possessing low current distortion and high dc-link utilization characteristic. By synthesizing output references without zero states, both CMV levels and circulating current can be suppressed in effect. Based on a two-module parallel connected system, the simplified model is made to discuss the phenomenon of circulating current. Besides, the simulation and test results are presented to validate the performance of 3-D PWM in balanced and unbalanced condition respectively.