DocumentCode :
3599633
Title :
Automated Physical Verification of I/O Pads in Full-Custom Environment
Author :
Anand, Rajesh Mangalore ; Ravula, Soujanya ; Kalpashree, M.A. ; Satavisa, Soumya
Author_Institution :
Design Enabling & Services IP Libr. Div., Infineon Technol. India Pvt. Ltd., Bangalore, India
fYear :
2014
Firstpage :
203
Lastpage :
205
Abstract :
In the final phase of Input/Output (I/O) pad library development, new methods for physical verification of I/O pads are proposed to verify the integrated circuit design for manufacturability and electrical connectivity rules. While I/O pad ring is constructed to verify Design Rule Check (DRC) and Antenna DRC checks, an I/O pad pattern is developed to check Electrical Rule Check (ERC) which brings a new paradigm to the sign off verification methods. The automated verification process is tested over different bond package I/O libraries spanning across different technologies in Cadence Design Framework (DFII) full custom platform to demonstrate significant reduction in manual effort and increase efficiency in verification methods.
Keywords :
formal verification; integrated circuit design; Cadence design framework; DFII; ERC; I/O pad pattern; antenna DRC check; automated physical verification process; bond package; design rule check; electrical connectivity; electrical rule check; full-custom environment; input/output pad ring; integrated circuit design; Algorithm design and analysis; Antennas; Automation; Electrostatic discharges; Layout; Libraries; Manuals; Cadence Design Framework; I/O pads; physical verification;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic System Design (ISED), 2014 Fifth International Symposium on
Print_ISBN :
978-1-4799-6964-7
Type :
conf
DOI :
10.1109/ISED.2014.49
Filename :
7172776
Link To Document :
بازگشت