Conflict-Free Code Block Scheduling to Hide SpMT Inter-Core Register Sync Delay

Speculative Multi-Threading (SpMT) is a promising technology to harness the growing number of cores in modern CPUs by exploiting the available parallelism out of sequential threads. And with SpMT, the inter-dependent fine-grain threads on different cores need to sync their input and output registers. Inter-core register sync is quite expensive, and heavily impacts the overall performance. We propose a conflict-free scheduling to avoid register read/write conflicts among concurrently executing code blocks. Therefore, while executing, the fine-grain threads do not need to sync the input or output registers with each other. Their output registers are still synced across the cores, but only consumed later. Consequently, the register sync and the execution are decoupled, and the inter-core waiting are eliminated or hidden. However, sometimes the conflict-free scheduling does not perform well when there are insufficient conflict-free code blocks to feed all the available cores. We found that, this problem with conflict-free scheduling could be partially fixed by complementing it with the naive scheduling. Experiments with SPEC2006 showed that in most cases (24 out of 29) the improved scheduling (Hybrid scheduling), i.e. The combination of the conflict-free scheduling and the naive scheduling, significantly out performed the naive scheduling.