• DocumentCode
    3600743
  • Title

    CoreTSAR: Core Task-Size Adapting Runtime

  • Author

    Scogland, Thomas R. W. ; Wu-Chun Feng ; Rountree, Barry ; de Supinski, Bronis R.

  • Author_Institution
    Dept. of Comput. Sci., Virginia Tech, Blacksburg, VA, USA
  • Volume
    26
  • Issue
    11
  • fYear
    2015
  • Firstpage
    2970
  • Lastpage
    2983
  • Abstract
    Heterogeneity continues to increase at all levels of computing, with the rise of accelerators such as GPUs, FPGAs, and other co-processors into everything from desktops to supercomputers. As a consequence, efficiently managing such disparate resources has become increasingly complex. CoreTSAR seeks to reduce this complexity by adaptively worksharing parallel-loop regions across compute resources without requiring any transformation of the code within the loop. Our results show performance improvements of up to three-fold over a current state-of-the-art heterogeneous task scheduler as well as linear performance scaling from a single GPU to four GPUs for many codes. In addition, CoreTSAR demonstrates a robust ability to adapt to both a variety of workloads and underlying system configurations.
  • Keywords
    computational complexity; parallel processing; CoreTSAR; adaptively worksharing parallel-loop regions; complexity reduction; core task-size adapting runtime; Acceleration; Computational modeling; Graphics processing units; Memory management; Programming; Runtime; Schedules; Heterogeneous, OpenMP, OpenACC, GPU, coscheduling;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/TPDS.2014.2365192
  • Filename
    6936921