DocumentCode :
3601151
Title :
Parallel Stimulus Generation Based on Model Checking for Coherence Protocol Verification
Author :
Kang Zhao ; Wenbo Shen
Author_Institution :
Intel Corp., Beijing, China
Volume :
23
Issue :
12
fYear :
2015
Firstpage :
3124
Lastpage :
3128
Abstract :
The complexity of the multicore communication protocols makes it a huge effort to validate the corresponding register transfer level (RTL). To achieve the high coverage of simulation, this brief proposes a covalidation method to generate the RTL testbench based on the model-checking technique. An object-oriented event-mapping technique is proposed to transform the sequential traces created by formal method to parallel RTL stimulus. A case study on the modified, exclusive, shared and invalid protocol was performed and showed that the covalidation method could save significant effort to create RTL testbenches while maintaining high coverage.
Keywords :
flip-flops; microprocessor chips; multiprocessing systems; object-oriented methods; protocols; RTL; coherence protocol verification; covalidation method; model checking technique; multicore communication protocols; object-oriented event-mapping technique; parallel stimulus generation; register transfer level; Coherence; Hardware design languages; Integrated circuit modeling; Model checking; Object oriented modeling; Protocols; Formal verification; model checking; system testing; system testing.;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2014.2384040
Filename :
7010043
Link To Document :
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