DocumentCode
3601406
Title
Improved Learning Performance of Hardware Self-Organizing Map Using a Novel Neighborhood Function
Author
Hikawa, Hiroomi ; Maeda, Yutaka
Author_Institution
Sci. & Eng. Dept., Kansai Univ., Suita, Japan
Volume
26
Issue
11
fYear
2015
Firstpage
2861
Lastpage
2873
Abstract
Many self-organizing maps (SOMs) implemented on hardware restrict their neighborhood function values to negative powers of two. In this paper, we propose a novel hardware friendly neighborhood function that is aimed to improve the vector quantization performance of hardware SOM. The quantization performance of the hardware SOM with the proposed neighborhood function is examined by simulations. Simulation results show that the proposed function can improve the hardware SOM´s vector quantization capability even though the function value is restricted to negative powers of two. Then, the hardware SOM is implemented on field-programmable gate array to find out the hardware cost and performance speed of the proposed neighborhood function. Experimental results show that the proposed neighborhood function can improve SOM´s quantization performance without additional hardware cost or slowing down the operating speed. Due to fully parallel operation, the proposed SOM with 16 × 16 neurons achieves a performance of 25344 million connections updates per second.
Keywords
learning (artificial intelligence); self-organising feature maps; vectors; FPGA; SOM; field-programmable gate array; hardware cost; hardware self-organizing map; learning performance; neighborhood function; parallel operation; performance speed; vector quantization performance; Arrays; Clocks; Field programmable gate arrays; Hardware; Neurons; Vectors; Field-programmable gate array (FPGA); hardware; neighborhood function; self-organizing map (SOM); self-organizing map (SOM).;
fLanguage
English
Journal_Title
Neural Networks and Learning Systems, IEEE Transactions on
Publisher
ieee
ISSN
2162-237X
Type
jour
DOI
10.1109/TNNLS.2015.2398932
Filename
7047225
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