Title :
A Continuous-Time Sturdy-MASH
Modulator in 28 nm CMOS
Author :
Do-Yeon Yoon ; Ho, Stacy ; Hae-Seung Lee
Author_Institution :
Massachusetts Inst. of Technol., Cambridge, MA, USA
Abstract :
This paper presents a practical way to achieve both wide signal bandwidth and high dynamic range in a continuous- time (CT) delta-sigma modulator. Quantization noise is suppressed aggressively by increasing the effective order of the noise transfer function based on a sturdy multi-stage noise-shaping (SMASH) architecture. The proposed CT SMASH architecture has a much wider signal bandwidth which was limited in the discrete-time (DT) SMASH architecture due to the inherent sampling frequency limitation of DT implementation. Furthermore, the proposed CT SMASH architecture provides better quantization noise suppression by more completely canceling the quantization noise from the 1st-loop. The CT SMASH architecture is implemented with several efficient circuit techniques suitable for high operation speed. As a result, the prototype fabricated in 28 nm CMOS achieves DR of 85 dB, peak SNDR of 74.9 dB, SFDR of 89.3 dBc, and Schreier FOM of 172.9 dB over a 50 MHz bandwidth at a 1.8 GHz sampling frequency.
Keywords :
continuous time systems; delta-sigma modulation; quantisation (signal); transfer functions; continuous-time delta-sigma modulator; continuous-time sturdy-MASH modulator; frequency 1.8 GHz; high dynamic range; noise transfer function; quantization noise; sampling frequency; size 28 nm; sturdy multi-stage noise-shaping architecture; wide signal bandwidth; Bandwidth; Delays; Feedforward neural networks; Multi-stage noise shaping; Noise; Quantization (signal); Transfer functions; Analog-to-digital converter (ADC); analog delay; continuous-time (CT); delta-sigma; multi-stage noise-shaping;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2015.2466459