DocumentCode :
3606260
Title :
High-order incremental sigma–delta for compressive sensing and its application to image sensors
Author :
Guicquero, W. ; Verdant, A. ; Dupret, A.
Author_Institution :
LETI, CEA, Grenoble, France
Volume :
51
Issue :
19
fYear :
2015
Firstpage :
1492
Lastpage :
1494
Abstract :
ΣΔ ADCs show promising perspectives in the field of compressive sensing (CS). A major limitation related to the first-order ΣΔ is its high oversampling ratio (OSR) that is required for a specific bit resolution. An extension to the high-order incremental ΣΔ for the implementation of a dedicated image sensor is presented. By extending the concept of the ΣΔ CS ADC, optimal working points can be reached between the OSR and the compression ratio. Simulations of a particular fourth-order ADC combined with the authors column-based Bernoulli CS scheme show a severe relaxation on the ADC master clock.
Keywords :
compressed sensing; image sensors; sigma-delta modulation; ΣΔ CS ADC; ADC master clock; CS reconstruction; OSR; bit resolution; column-based Bernoulli CS scheme; compression ratio; compressive sensing; fourth-order analog-digital converter; high-order incremental sigma-delta; image sensor; oversampling ratio;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2015.2233
Filename :
7272233
Link To Document :
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