DocumentCode :
3606585
Title :
A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers
Author :
Boo, Hyun H. ; Boning, Duane S. ; Hae-Seung Lee
Author_Institution :
Massachusetts Inst. of Technol., Cambridge, MA, USA
Volume :
50
Issue :
12
fYear :
2015
Firstpage :
2912
Lastpage :
2921
Abstract :
The virtual ground reference buffer (VGRB) technique is introduced as a means to improve the performance of switched-capacitor circuits. The technique enhances the performance by improving the feedback factor of the op-amp without affecting the signal gain. The bootstrapping action of the level-shifting buffers relaxes key op-amp performance requirements including unity-gain bandwidth, noise, open-loop gain and offset compared with conventional circuits. This reduces the design complexity and the power consumption of op-amp based circuits. Based on this technique, a 12 b pipelined ADC is implemented in 65 nm CMOS that achieves 67.0 dB SNDR at 250 MS/s and consumes 49.7 mW of power from a 1.2 V power supply.
Keywords :
CMOS integrated circuits; analogue-digital conversion; buffer circuits; operational amplifiers; power consumption; switched capacitor networks; CMOS; bootstrapping action; level-shifting buffers; op-amp based circuits; open-loop gain; pipelined ADC; power 49.7 mW; power consumption; size 65 nm; switched-capacitor circuits; unity-gain bandwidth; virtual ground reference buffers; voltage 1.2 V; Bandwidth; Capacitors; Noise; Parasitic capacitance; Power demand; Switched capacitor circuits; Analog-to-digital converter; op-amp; pipelined ADC; reference buffer; switched-capacitor circuits; virtual ground reference buffer;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2015.2467183
Filename :
7273978
Link To Document :
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