Carrierless pulse width modulation strategy for multilevel inverters

This study develops a pulse width modulation (PWM) strategy with a view to achieve explicit control of voltage and accrue a minimum total harmonic distortion in a multilevel inverter (MLI) of any preferred level. The multi objective digital formulation tailors to facilitate discrimination of pulses for various levels and equalise the switching losses in all the power switches in the MLI. The philosophy of the method centres to calculate the pulses for the desired target fundamental output voltage based on equal area criteria. It excludes the need for a carrier in the generation of the PWM pulses through a process of matching the output level with the sectionalised dc levels and travels to determine the switching instants using mathematical relations. It includes simulation results from a MATLAB platform for a seven level MLI and avails the use of a field programmable gate array-based prototype to validate the findings.