DocumentCode
3607754
Title
Amorphous IGZO Thin-Film Transistors With Ultrathin Channel Layers
Author
Tsung-Han Chiang ; Bao-Sung Yeh ; Wager, John F.
Author_Institution
Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA
Volume
62
Issue
11
fYear
2015
Firstpage
3692
Lastpage
3696
Abstract
The impact of decreasing channel layer thickness on the electrical performance of RF-sputtered amorphous indium- gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) is investigated through the evaluation of drain current versus gate voltage (ID-VG) transfer curves. For a fixed set of process parameters, it is found that the turn-on voltage, VON (off-drain current, IDOFF) increases (decreases) with decreasing a-IGZO channel layer thickness (h) for h <; 11 nm. The VON - h trend is attributed to a large density (3.5 × 1012 cm-2) of backside surface acceptorlike traps and an enhanced density (3 × 1018 cm-3) of donorlike trap states within the upper 11 nm from the backside surface. The precipitous decrease observed in IDOFF - h when h <; 11 nm is ascribed to backside surface acceptorlike traps and the closer physical proximity of the backside surface when the channel layer is ultrathin. An alteration of the sputtering process gas ratio of Ar/O2 from 9/1 to 10/0 and a reduction of the annealing temperature from 400°C to 150°C result in improved transistor performance for a h ≈ 5 nm a-IGZO TFT, characterized by VON≈ 0 V, field-effect mobility of μFE = 9 cm2V-1s-1, subthreshold swing of S = 90 mV/decade, and drain current on-to-off ratio of IDON-OFF = 2 × 105.
Keywords
amorphous semiconductors; annealing; carrier mobility; gallium compounds; indium compounds; sputtering; thin film transistors; zinc compounds; RF-sputtering; TFT; amorphous IGZO thin-film transistor; amorphous indium-gallium-zinc oxide; annealing temperature; backside surface acceptor-like trap; donor-like trap state; drain current-gate voltage transfer curve; field-effect mobility; sputtering process gas ratio; subthreshold swing; temperature 400 C to 150 C; ultrathin channel layer; Annealing; Logic gates; Market research; Sputtering; Surface treatment; Thin film transistors; amorphous materials; charge carrier density; charge carrier density.; semiconductor-insulator interfaces; thin film transistors; thin films;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2015.2478700
Filename
7293163
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