Title :
Highly Stable, High Mobility Al:SnZnInO Back-Channel Etch Thin-Film Transistor Fabricated Using PAN-Based Wet Etchant for Source and Drain Patterning
Author :
Sung Haeng Cho ; Jong Beom Ko ; Min Ki Ryu ; Jong-Heon Yang ; Hye-In Yeom ; Sun Kwon Lim ; Chi-Sun Hwang ; Sang-Hee Ko Park
Author_Institution :
Electron. Telecommun. Res. Inst., Daejeon, South Korea
Abstract :
We report the electrical characteristics of backchannel etch (BCE) metal-oxide-semiconductor thin-film transistor (TFT) comprised of aluminum-doped tin-zinc-indium oxide (ATZIO). It has high etch selectivity in wet chemical etchants, which consist of H3PO4, CH3COOH, and HNO3. This is contrary to the conventional metal-oxide-semiconductors of indium-gallium-zinc oxides, which are highly soluble in the acidic chemicals. As a result, no etch stop layer is needed to protect the backchannel from the wet etchant damage during the source and drain patterning in the bottom-gate-staggered TFT structure. This provides the possibility of oxide TFT fabrication process made as simple as that of the current amorphous silicon TFT using three or four photomasks with short channel length and less parasitic capacitance. The electrical characteristics of our ATZIO BCE-TFTs have the mobility of 21.4 cm2/V · s, subthreshold swing (S.S) of 0.11 V/decade, and threshold voltage of 0.8 V. In spite of the BCE structure, they have excellent stability against bias temperature stress, which shows the threshold voltage shifts of +0.75 V and -0.51 V under the prolonged positive (+20 V) and negative (-20 V) gate bias stresses for 10 000 s at 60 °C, respectively.
Keywords :
aluminium; amorphous semiconductors; etching; gallium compounds; indium compounds; masks; silicon; thin film transistors; tin compounds; ATZIO BCE-TFT; Al:SnZnInO; H3PO4; HNO3; InGaZnO; PAN; Si; acetic acid; acidic chemicals; amorphous silicon TFT; back-channel etch thin-film transistor; bias temperature stress; bottom-gate-staggered TFT structure; drain patterning; electrical characteristics; etch selectivity; gate bias stresses; indium-gallium-zinc oxides; metal-oxide-semiconductor thin-film transistor; nitric acid; oxide TFT fabrication process; parasitic capacitance; phosphoric acid; photomasks; source patterning; subthreshold swing; temperature 60 degC; threshold voltage; time 10000 s; voltage 0.51 V; voltage 0.75 V; voltage 0.8 V; voltage 20 V; wet chemical etchants; Chemicals; Logic gates; Metals; Stress; Thermal stability; Thin film transistors; Aluminum-doped tin-zinc-indium oxide (ATZIO); Aluminum-doped tin???zinc???indium oxide (ATZIO); acetic acid; and nitric acid (PAN) etchant for source/drain (SD).; backchannel etch thin-film transistor (BCE-TFT); high mobility; high stability; nitric acid (PAN) etchant for source/drain (SD); phosphoric acid;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2015.2479592