Title :
2 ps resolution, fine-grained delay element in 28 nm FDSOI
Author :
Hua, W. ; Tadros, R.N. ; Beerel, P.
Author_Institution :
Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
A novel diversely body-biased current-starved delay element (DE) architecture for fine-grained DEs is presented. Using fully depleted silicon-on-insulator back-body biasing, it achieves a resolution of 2 ps with a delay quantisation error of 7.1%. Compared with the state-of-the-art DEs, it exhibits the least leakage current and efficient overall energy consumption and is the most robust to process variations.
Keywords :
energy consumption; leakage currents; silicon-on-insulator; FDSOI; delay quantisation error; diversely body-biased current-starved delay element; energy consumption; fine-grained DE; fine-grained delay element; fully depleted silicon-on-insulator back-body biasing; leakage current; size 28 nm;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2015.2667
