DocumentCode :
3610619
Title :
A 4 \\times 4 MIMO-OFDM Baseband Receiver With 160 MHz Bandwidth for Indoor Gigabit Wireless Communications
Author :
Pei-Yun Tsai ; Po-Cheng Lo ; Fong-Jay Shih ; Wen-Ji Jau ; Meng-Yuan Huang ; Zheng-Yu Huang
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
Volume :
62
Issue :
12
fYear :
2015
Firstpage :
2929
Lastpage :
2939
Abstract :
This paper presents the design and implementation of a 4 × 4 multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) baseband receiver for indoor high-throughput wireless communication systems. The receiver uses bandwidths of 40, 80, and 160 MHz that correspond to three operation modes of 128, 256, and 512-point FFT, respectively. Four spatial streams are supported to offer the maximum uncoded data rate of 2.6 Gbps. Channel pre-processing based on sorted QR decomposition and the non-constant K-best soft-output MIMO detector are adopted to enhance the system performance. The addressing scheme for the QR phase memory is proposed to deal with the processing-time discrepancy between the write-in and read-out accesses. The high-throughput pipelined architecture for the non-constant K-best soft-output MIMO detector with selected discard-paths is analyzed to show a balance between performance and complexity. This receiver IC integrates 1.034 M logic gates as well as a total of 835 Kb SRAM in 90 nm CMOS technology and can generate hard output for 64-QAM constellation. The coded system performance is also provided with the soft-output MIMO detection. From the measurement results, the power consumption of the chip is 424 mW, 97 mW, and 26 mW at 1.16 V, 0.8 V and 0.66 V, respectively, for operations in 160 MHz, 80 MHz, and 40 MHz bandwidth modes. Compared to the prior works for 80 MHz channel bandwidth, this work supports wider channel bandwidth and achieves higher throughput.
Keywords :
CMOS integrated circuits; MIMO communication; OFDM modulation; indoor radio; power consumption; quadrature amplitude modulation; radio receivers; signal detection; wireless channels; CMOS technology; MIMO-OFDM baseband receiver; QAM constellation; QR phase memory; SRAM; bandwidth 160 MHz; bandwidth 40 MHz; bandwidth 80 MHz; bit rate 2.6 Gbit/s; channel preprocessing; high-throughput pipelined architecture; indoor gigabit wireless communication; indoor high-throughput wireless communication system; memory size 835 KByte; multiple-input multiple-output system; nonconstant K-best soft-output MIMO detector; orthogonal frequency division multiplexing; power 26 mW; power 424 mW; power 97 mW; power consumption; read-out access; size 90 nm; sorted QR decomposition; voltage 0.66 V; voltage 0.8 V; voltage 1.16 V; write-in access; Bandwidth; Baseband; Channel estimation; MIMO; Receivers; Synchronization; Wireless communication; 802.11ac; Baseband; MIMO-OFDM; gigabit wireless; receiver;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2015.2495740
Filename :
7330042
Link To Document :
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