Total Ionizing Dose (TID) Effects in Extremely Scaled Ultra-Thin Channel Nanowire (NW) Gate-All-Around (GAA) InGaAs MOSFETs

Author

Shufeng Ren ; Mengwei Si ; Kai Ni ; Xin Wan ; Jin Chen ; Sungjae Chang ; Xiao Sun ; En Xia Zhang ; Reed, Robert A. ; Fleetwood, Daniel M. ; Peide Ye ; Cui, Sharon ; Ma, T.P.

Author_Institution

Electr. Eng. Dept., Yale Univ., New Haven, CT, USA

Volume

62

Issue

6

fYear

2015

Firstpage

2888

Lastpage

2893

Abstract

InGaAs nanowire (NW) gate-all-around (GAA) MOSFETs exhibit superior radiation hardness compared to planar devices and FinFETs, benefitting from reduced gate-oxide electric fields. Applied gate bias during irradiation, channel thickness, and presence or absence of a forming gas anneal can strongly affect NW device radiation hardness. Low-frequency noise measurements are carried out to probe near-interfacial oxide-trap (border-trap) densities, and TCAD simulations are performed to assist in understanding the charge trapping in NW channel devices with high-k gate dielectrics. Optimized device structures exhibit high radiation tolerance.

Keywords

III-V semiconductors; MOSFET; gallium arsenide; high-k dielectric thin films; indium compounds; integrated circuit measurement; integrated circuit noise; nanowires; radiation hardening (electronics); FinFET; GAA; InGaAs; InGaAs MOSFET; NW device radiation hardness; TCAD simulations; TID; border-trap density; channel devices; charge trapping; gate-all-around; gate-oxide electric fields; high radiation tolerance; high-k gate dielectrics; low-frequency noise measurements; near-interfacial oxide-trap density; planar devices; total ionizing dose; ultrathin channel nanowire; High-K gate dielectrics; Indium gallium arsenide; MOSFET; Nanowires; $1/f$ noise; InGaAs; TCAD simulation; border traps; gate-all-around; high-k dielectric; nanowire; oxide traps;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2015.2497090

Filename

7348786