A CMOS ASIC time-to-digital converter for short time interval measurements

The aim of this work was to study the possibility of using CMOS ASIC technology to construct accurate time-interval-measurement devices, for which ECL (emitter-coupled-logic) technology is normally used because of its better stability. The accuracy of the time-to-digital converter constructed for the averaging of 10/sup 6/ measurement results is estimated to be about 6.7 ps, which corresponds to a distance accuracy of 1 mm in laser rangefinding applications. This was achieved using only a 50-MHz external clock frequency, which was effectively tripled using three-phase clocking. The large timing jitter typical of CMOS technology, caused by supply noise, was suppressed by careful layout and a very forgiving averaging algorithm. It was found that phase errors in the three-phase oscillator do not bias the measurement result. Some jitter is needed in the repetition rate of the measurements, however, for reliable averaging of the results. The measurement speed was limited by the external computer, but automatic accumulation of 64 successive measurements helped to reduce the time required to obtain 10/sup 6/ measurements from 10 min to 20 s.