Influence of trapping on silicon microstrip detector design and performance

New systematic measurements of effective carrier trapping times were used as an input to simulation of irradiated silicon strip detector operation. Charge collection efficiency (CCE) dependence on bias voltage, magnetic field, irradiation particle type, fluence and detector design was investigated. It was observed, that irradiated detectors processed on standard n-silicon material with n/sup +/ strips performed better than those with p/sup +/ strips. At /spl Phi//sub eq/ = 2 /spl times/ 10/sup 14/ cm/sup -2/ the difference is around 10% at voltages well above V/sub FD/ and even larger for lower voltages. A few percent difference in CCE for different track paths across the strip is predicted. Effective Lorentz angle was found to be independent on irradiation level. A non-negligible amount of charge appears also on neighboring strips as a consequence of charge trapping. The influence of detector thickness and strip width on induced charge was also studied.