• DocumentCode
    3613642
  • Title

    An FPGA interpreter with virtual hardware management

  • Author

    O. Diessel;U. Malik

  • fYear
    2002
  • fDate
    6/24/1905 12:00:00 AM
  • Keywords
    "Field programmable gate arrays","Hardware","Circuits","Automatic control","Runtime","Costs","Algebra","Computer science","Design engineering","Hip"
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium., Proceedings International, IPDPS 2002, Abstracts and CD-ROM
  • Print_ISBN
    0-7695-1573-8
  • Type

    conf

  • DOI
    10.1109/IPDPS.2002.1016553
  • Filename
    1016553