Title :
Enhancing the performance of tiled loop execution onto clusters using memory mapped network interfaces and pipelined schedules
Author :
A. Sotiropoulos;G. Tsoukalas;N. Koziris
Author_Institution :
National Technical University of Athens
fDate :
6/24/1905 12:00:00 AM
Keywords :
"Tiles","Shape","Processor scheduling","Delay","Computer networks","Linear programming","Network interfaces","Computer interfaces","Systems engineering and theory","Laboratories"
Conference_Titel :
Parallel and Distributed Processing Symposium., Proceedings International, IPDPS 2002, Abstracts and CD-ROM
Print_ISBN :
0-7695-1573-8
DOI :
10.1109/IPDPS.2002.1016567
